Regviz

Microchip Technology /ATSAME51N20A /OSCCTRL /DFLLSYNC

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DFLLSYNC

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Microchip Technology/ATSAME51J19A/OSCCTRL/DFLLSYNC#0x0

7 43 0 0 00 0 0 0 0 0 0 0 0 (ENABLE)ENABLE 0 (DFLLCTRLB)DFLLCTRLB 0 (DFLLVAL)DFLLVAL 0 (DFLLMUL)DFLLMUL

Description

DFLL48M Synchronization

Fields

ENABLE

ENABLE Synchronization Busy
DFLLCTRLB

DFLLCTRLB Synchronization Busy
DFLLVAL

DFLLVAL Synchronization Busy
DFLLMUL

DFLLMUL Synchronization Busy

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data